Genesys Logic
 
Storage Product
 
Scanner Product
 
USB Hub Product
 
USB Video Product
 
Silicon Intellectual Property
 
PCI Express Product
 
USB Audio Product
 
Standalone USB PHY
Scanner Product>Scanner ControllerGL846
    GL846
 

   Summarize
 
Genesys Logic's single-chip GL846 (GeneScanTM series) is a high speed, high performance and rich scalability controller for scanner with fast ADF function. It successfully integrates scanner function ASIC and USB 2.0 interface controller into one single-chip. With its high performance design architecture, GL846 is not only ready for supporting CIS or CCD image sensors (600, 1200, 2400, 3200, 3600, 4800 and 9600dpi resolution) that are used in sheet fed, flatbed or transparency scanners, but is able to co-work with unipolar or bipolar stepping motors. Advanced features of GL846 include five motor acceleration/ deceleration curve tables for high speed motor moving.

    Related Products
             GL845
             GL123
 
    Feature
 
l Highly integrated scanner controller chip (2-in-1; Scanner Controller and USB 2.0 Interface)
l USB 2.0 High Speed (480Mbit) compliant
l Designed for sheetfed, flatbed and transparency scanners
l Embedded RISC CPU for USB protocol handling
l Support MCU with SPI interfaces for special application in 208-pin package
l Support single AFE for dual head scanning
l Support two chips application for fast dual head scanning
l Supports external 24Kbytes flash ROM or internal 24Kbyte mask ROM
l Firmware online-download for external flash ROM programming
l 12MHz low frequency clock input for better EMI
l Adjustable working clock of scanner controller for different usage (12M, 24M, 30M, 40M, 48M, 60MHz)
l Supports linear or stagger CCD, such as NEC, Toshiba or Sony CCD
l Available sensor types: 600, 1200, 2400, 3200, 3600, 4800 and 9600 dpi color CIS or CCD
l Multi-TG control for CCD (separately controls the R/G/B exposure time)
l Shutter-control for CCD (separately controls the R/G/B exposure time)
l Supports two scanning types: pixel-by-pixel (pixel rate), line-by-line (line rate)
l Support 48-bits color, 16-bits gray and 1-bit line-art
l “True gray” with R, G and B weightings
l 16 bits white/dark shading and 16 bits Gamma correction
l Supports RS232 interface for special applications
l Supports EEPROM (93C46) interface for special applications
l Supports ADF (Auto-Document-Feeder) function with document, ADF and cover sensors
l Supports auto-ADF with automatically feeding in, automatically scanning and automatically feeding out
l Lines packing for stagger CCD or R/G/B line differences
l Fine CDS sampling adjustment to avoid the digital noise influence (8.33ns adjustment)
l Digital average and hardware deletion for various resolutions
l Hardware deletion for various resolutions (from 9600~1dpi with 1dpi decrement)
l Supports 1M*16, 4M*16, 8M*16, 16M*16 and 32M*16 SDRAM
l Supports up to 1 G bits size SDRAM (implements two SDRAM)
l Supports 5 acceleration/deceleration motor tables for high speed motor moving and wall hitting protection
l Supports controllable bipolar motor in full, half, quarter and eighth steps moving
l Supports controllable unipolar motor in full and half steps moving
l Supports V-reference automatic control for motor driver Ics
l Build-in PWM control phase for unipolar motors
l Programmable dummy lines to resolve start/stop (discontinuous) problem
l Watchdog protection for lamp, motor and ASIC
l Lamp time-out (sleeping) control
l Supports 22 GPIO pins and 6 GPO pins for 128-pin package
l Supports 27 GPIO pins and 6 GPO pins for 208-pin package
l Supports PWM outputs for flatbed/transparency lamp control with programmable duties and frequencies
l Supports LED blinking
l Supports back-scanning
l Supports multi-film scanning
l Support two 1-channel CIS sensors for duplex scanner using a 3-channel or 2-channel AFE
− ASIC controls the LED_R, LED_G and LED for upper and lower two CIS sensors at the same time
− ASIC controls CIS SP and CIS clock at the same time
− ASIC latches the two channel image data when using 3-channel AFE or a 2-channel AFE
 
 
                          Copyright 1998-2010. Genesys Logic, Inc. All Rights Reserved. Designed by Honeycomb